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27-Oct-2005
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- Working on another port, this time Donkey Kong from Office
D-San.
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26-Oct-2005
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- Bally Astrocade is up and running. Like the
VIC-20, my video output is a terrible hack job, and I really need to
fix it up before I post the source (coming soon).
- Added TRS-80 image with floppy disk image support to the downloads.
- I'm running out of designs to port, except for the MikeJ's vector
emulation - Asteroids.
- We're sourcing components so we can start the schematic capture for
our PACE board.
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18-Oct-2005
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- Yet another platform on the agenda - this time I've ripped off
MikeJ's Bally
Astrocade. Still WIP but I'm getting a white screen with red
border, so I'm on the right track. The C-ONE scan-doubler certainly
has come in useful... I really need to beef it up tho'...
- Soon I'll re-vamp the PACE project pages, and in the process post
the source for those designs I've ported to the Nanoboard (a bit of
tidy-up to do first).
- FWIW all this porting is really just an aside to the real work we're
doing on PACE. More soon...
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13-Oct-2005
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- Update - fixed the Alpha3
version of the C64! Video is a lot more stable than the VIC-20, might
go back to check it out. It's the first project I've built that
demonstrates simultaneous VGA and CVBS output.
- Having trouble getting the current C-ONE C64 port up and running.
Tobias Gubener was kind enough to send an earlier version of his port
without MMU. It's (monochrome) CVBS output but it
only took about 30 mins to get the machine booting to the BASIC
prompt.
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6-Oct_2005
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- The VIC-20 implementation runs using the C-ONE VIC20_ALT.VHD
and an adaptation of the scan doubler module. The video quality is
crap, but it's sufficient for a proof-of-concept. All the roms reside
inside the FPGA and the character 'ROM' is read-only.
- Might have a quick look at the C-ONE C64 Alpha port next...
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30-Sept-2005
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- Just for a diversion, I've started porting Tobias Gubener's port
(for the C-ONE) of MikeJ's (FPGA
ARCADE) VIC-20 implementation. The original was written for
a Virtex and outputs a colour composite signal, whilst the C-ONE port
is targeted to Altera and outputs a VGA signal (via a scan-doubler
module). It should be relatively straight-forward. Mike has suggested
(on his web page) an enhancement for playing .TAP (tape) files
into the emulation from a PC - I might look at that as well.
- I really should post the source for the (2) projects I have ripped
off other people - coming soon!
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28-Sept-2005
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- Update - fixed the keyboard
issues! Surprising how many games supported the Alpha Joystick!
- I've got two "drives" happening now. I can store two SS-DD
40 track drives in flash.
- I made up a disk with a handful of my favourite games - and this has
exposed a few shortcomings in my quick hack job - most notably the
incomplete keyboard implementation. It seems an awful lot of games
read from the keyboard map locations that return ambiguous results. So
I'll look into that first. Some games also appear to have a
permanently "stuck" key which I can't explain...
- I would like to point out that this was only ever meant to be a
proof-of-concept effort tho' ;)
- The question now is - what next for PACE? Do I persevere with
hooking up a real drive to the disk controller on the TRS-80? Or
should I move on to Model 4(P) implementation and add the hires board?
Or do I implement the Apple II disk controller? Do I move onto
something else entirely? I haven't made up my mind yet...
- I do know that I need to hassle Chris to finish his 6809 core. And
we should probably pull our fingers out and get the PCB design rolling
again...
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24-Sept-2005
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- Woo hoo - Newdos/80 works (read-only) as expected!!! In the end it
was a case of RTFM - FORCE_INTERRUPT should load the status register
with the Type I status bits.
- Next a quick hack to support Drive 1 in the 2nd half of the flash.
- Then I need to look at proper support for the alternate DAM (record
type) status bit.
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21-Sept-2005
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- YAH!!! The 'NewDos/80 Ready' prompt for the first time! A bit
of a fudge atm - I discovered that the data address marks on a disk
are actually meaningful (or at least, critical) - and I've hard-coded
the 'record type' status bit to act accordingly for the Model III
NEWDOS/80 master boot disk only.
- It's not over yet - whilst I can do a few commands that read from
the disk, it would seem that any command that checks for disk present
(such as 'DIR 0') is failing with 'Device Not Available'!?!
This is odd because I know for a fact that the boot sequence passes
the usual index hole detect thing... but I'm getting close!
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19-Sept-2005
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- Finally, NEWDOS/80 boots!!! However just like the 8051
implementation, it reboots after loading track 0, sector 16. Obviously
something is lacking (or plain wrong) in my implementation so far. Fun
fun fun...
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15-Sept-2005
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- Work on the FDC continues. All the Type I (head movement) commands
and also Read_Sector appear to work under simulation. I can even read
the 'disk' contents using BASIC INP/OUT commands on the running
emulation. However, it won't boot for some reason.
- I realised a few days ago that I've taken the wrong approach to the
FDC architecture. Rather than have the FDC talk SPI, what I really
should be doing is writing the FDC with the same interface as the real
chip, and emulate a device via SPI. However I'm going to
continue with what I've got and then re-write it when I get it
booting.
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2-Sept-2005
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- Finally got the SPI controller talking to the SPI flash on the
Nanoboard. I've port-mapped the SPI core registers in TRS-80 I/O space
so I have what I would guess is the only TRS-80 with an integrated SPI
controller!?! Now I can concentrate on emulating the FDC.
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29-Aug-2005
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- TRS-80 - and consequently the upper layers of the PACE source
hierarchy and some other modules - are now 100% (messy) VHDL. The
project compiles (and runs) as a Quartus project.
- Integration of the opencores SPI continues. First step is to add a
register interface to the TRS-80 I/O memory space to enable single
reads from the SPI flash. Then build WD FDC emulation around that.
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26-Aug-2005
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- Got MikeJ's Space Invaders
design running on the Nanoboard. Output is composite video which
requires additional circuitry so no download. Have converted all (Nanoboard)
files in this design to VHDL and have successfully built and run a
Quartus project.
- Here's a short video (DIVX 8MB) of (my)
Space Invaders (composite output captured on a DVB card) running on
the Nanoboard.
- Working on converting more of the PACE project to VHDL - more
specifically the TRS-80. The idea is to produce a Quartus project and
then integrate the opencores SPI core (Verilog) for the FDC.
- Also looking at porting more of MikeJ's designs to the Nanoboard.
These are particularly interesting because they use external SRAM (not
dual-port) for the video, including a vector frame buffer for
Asteroids.
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19-Aug-2005
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- Have abandoned the 8051 software-based implementation of the FDC.
Going to start with the opencores SPI core for reading disk data
stored in the on-board SPI flash. Then going to implement the FDC
directly in VHDL. Ultimately the SPI back-end will be interchangeable
with, for example, an interface to an original TRS-80 floppy drive or
even modern drives (3.5"/5.25"/Flash).
- The design is gradually being converted from Altium DXP schematic to
VHDL.
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